[LV] Back to the VAX: bitops

[Jan-Benedict Glaw]

On Sun, 2006-04-02 11:39:28 +0800, Kenn Humborg <kenn at bluetree.ie> wrote:
> > Finally, my move is mostly finished and I've started to look at the
> > VAXen again.  I'm currently looking at <asm/bitops.h>, which should
> > get a touch-up to use the newly defined generic functions in
> > <asm-generic/bitops/*>.
> 
> If you're adding or modifying any primitives, could you add
> test cases to archtest.c as well?

Sure. Though I think testing the atomicity is a bit hard; that would
require starting some threads... (Could be done, sure, but I guess
that's a bit too much :-)

> > /* Supposed to not be atomic.  */
> > static __inline__ void __set_bit(int nr, volatile void *addr)
> > {
> >         __asm__(
> >         "       bbss    %1, %0, 2f              \n"
> >         "2:                                     \n"
> >         : "=m" (ADDR)
> >         : "ir" (nr));
> > }
> > 
> > /* Supposed to be atomic.  */
> > static __inline__ void set_bit(int nr, volatile void *addr)
> > {
> >         __asm__ __volatile__(
> >         "       bbss    %1, %0, 1f              \n"
> >         "1:                                     \n"
> >         : "=m" (ADDR)
> >         : "ir" (nr));
> > }
> > 
> > 
> > In both cases, bbss was chosen, but I guess bbssi would have been more
> > correct for set_bit()?
> 
> Shouldn't matter for uniprocessor.  But bbssi would be right for
> SMP.

Hey, at least I aim towards SMP support for the 63x0 :)

> BTW, are these verbatim excerpts?  If so, how does it work at
> all ("addr" and "ADDR")?

Cut'n'pasted, so possibly whitespace-mangled, but it worke because
there's a macro like:

	#define ADDR *(volatile unsigned long *) addr

> I think the nr constraint could be "g".  I don't see any reason
> to force GCC to load it into a register.

ACK.

MfG, JBG

-- 
Jan-Benedict Glaw       jbglaw at lug-owl.de    . +49-172-7608481             _ O _
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